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1 for more information www.linear.com/ltc3621 typical a pplica t ion fea t ures descrip t ion 17v, 1a synchronous step-down regulator with 3.5a quiescent current the lt c ? 3621/ltc3621-2 is a high efficiency 17v, 1a synchronous monolithic step-down regulator. the switch - ing frequency is fixed to 1mhz or 2.25mhz. the regulator features ultralow quiescent current and high efficiencies over a wide v out range. the step-down regulator operates from an input voltage range of 2.7v to 17v and provides an adjustable output range from 0.6v to v in while delivering up to 1a of output current. a user-selectable mode input is provided to allow the user to trade off ripple noise for light load efficiency; burst mode operation provides the highest efficiency at light loads, while pulse-skipping mode provides the low - est voltage ripple. list of ltc3621 options part name frequency v out ltc3621 1.00mhz adjustable ltc3621-2 2.25mhz adjustable efficiency and power loss vs load 2.5v v out with 400ma burst clamp, f sw = 1mhz a pplica t ions n wide v in range: 2.7v to 17v n wide v out range: 0.6v to v in n 95% max efficiency n low i q < 3.5a, zero-current shutdown n constant frequency (1mhz/2.25mhz) n full dropout operation with low i q n 1a rated output current n 1% output voltage accuracy n current mode operation for excellent line and load transient response n pulse-skipping, forced continuous, burst mode ? operation n internal compensation and soft-start n overtemperature protection n compact 6-lead dfn (2mm 3mm) package or 8-lead msope package with power good output and independent sgnd pin n portable-handheld scanners n automotive applications n emergency radio l , lt, ltc, ltm, burst mode, linear technology and the linear logo are registered trademarks and hot swap is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents, including 5481178, 6580258, 6498466, 6611131, 6177787, 5705919, 5847554. 604k 22pf 1f 22f 3621 ta01a 4.7h v out 2.5v 1a 191k v in run sw v in 2.7v to 17v ltc3621 gnd fb mode intv cc 10f load current (a) 0.0001 0 efficiency (%) power loss (w) 10 30 40 50 100 70 0.001 0.01 3621 ta01b 20 80 90 60 0.0001 0.001 1.0 0.1 0.01 0.1 1 efficiency power loss v in = 12v ltc3621/ltc3621-2 3621f
2 for more information www.linear.com/ltc3621 a bsolu t e maxi m u m r a t ings v in voltage (note 2) ................................... 1 7v to C0.3v sw voltage dc................................. v in + 0.3v to C0.3v tr ansient (note 2) ................................... 1 9v to C2.0v run voltage ................................................ v in to C0.3v mode, fb voltages ...................................... 6 v to C0.3v (note 1) top view mode intv cc fb sw v in run dcb package 6-lead (2mm 3mm) plastic dfn 4 5 7 gnd 6 3 2 1 t jmax = 125c, v ja = 64c/w, v jc = 9.6c/w exposed pad (pin 7) is gnd, must be soldered to pcb 1 2 3 4 sw v in run pgood 8 7 6 5 sgnd mode intv cc fb top view 9 gnd ms8e package 8-lead plastic msop t jmax = 125c, v ja = 40c/w, v jc = 10c/w exposed pad (pin 9) is gnd, must be soldered to pcb p in c on f igura t ion e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at t j = 25c. v in = 12v, unless otherwise noted. (notes 3, 6) o r d er i n f or m a t ion lead free finish tape and reel part marking* package description temperature range ltc3621edcb#pbf ltc3621edcb#trpbf lgdg 6-lead (2mm w 3mm) plastic dfn C40c to 125c ltc3621idcb#pbf ltc3621idcb#trpbf lgdg 6-lead (2mm w 3mm) plastic dfn C40c to 125c ltc3621ems8e#pbf ltc3621ems8e#trpbf ltgdh 8-lead plastic msop C40c to 125c ltc3621ims8e#pbf ltc3621ims8e#trpbf ltgdh 8-lead plastic msop C40c to 125c ltc3621edcb-2#pbf ltc3621edcb-2#trpbf lghy 6-lead (2mm w 3mm) plastic dfn C40c to 125c ltc3621idcb-2#pbf ltc3621idcb-2#trpbf lghy 6-lead (2mm w 3mm) plastic dfn C40c to 125c ltc3621ems8e-2#pbf ltc3621ems8e-2#trpbf ltghz 8-lead plastic msop C40c to 125c ltc3621ims8e-2#pbf ltc3621ims8e-2#trpbf ltghz 8-lead plastic msop C40c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ intv cc , pgood voltages ............................ 6v to C0.3v operating junction temperature range (note 3) .................................................. C 40c to 125c storage temperature range .................. C 65c to 125c symbol parameter conditions min typ max units v in operating voltage 2.7 17 v v out operating voltage 0.6 v in v i vin input quiescent current shutdown mode, v run = 0v burst mode operation forced continuous mode (note?4), v fb < 0.6v 0 3.5 1.5 0.1 4.5 a a ma ltc3621/ltc3621-2 3621f
3 for more information www.linear.com/ltc3621 e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at t j = 25c. v in = 12v, unless otherwise noted. (notes 3, 6) note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: transient absolute maximum voltages should not be applied for more than 4% of the switching duty cycle. note 3: the ltc3621 is tested under pulsed load conditions such that t j t a . the ltc3621e is guaranteed to meet specifications from 0c to 85c junction temperature. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the ltc3621i is guaranteed over the C40c to 125c operating junction temperature range. note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. note 4: the quiescent current in forced continuous mode does not include switching loss of the power fets. note 5: the ltc3621 is tested in a proprietary test mode that connects v fb to the output of error amplifier. note 6: t j is calculated from the ambient, t a , and power dissipation, p d , according to the following formula: t j = t a + (p d ? ja ) symbol parameter conditions min typ max units v fb regulated feedback voltage l 0.594 0.591 0.6 0.6 0.606 0.609 v v i fb fb input current 10 na v line(reg) reference voltage line regulation v in = 2.7v to 17v (note 5) 0.01 0.015 %/v v load(reg) output voltage load regulation (note 5) 0.1 % i lsw nmos switch leakage pmos switch leakage 0.1 0.1 1 1 a a r ds(on) nmos on-resistance pmos on-resistance v in = 5v 0.15 0.37 d max maximum duty cycle v fb = 0.5v, v mode = 1.5v l 100 % t on(min) minimum on-time v fb = 0.7v, v mode = 1.5v 60 ns v run run input high threshold run input low threshold 0.3 1.0 v v i run run input current v run = 12v 0 20 na v mode pulse-skipping mode burst mode operation forced continuous mode v intvcc C 0.4 1.0 0.3 v intvcc C 1.0 v v v i mode mode input current v mode = 3.6v 0 10 na t ss internal soft-start time 0.5 ms i lim peak current limit l 1.44 1.30 1.60 1.76 1.80 a a v uvlo v intvcc undervoltage lockout v in ramping up 2.4 2.6 2.7 v v uvlo(hys) v intvcc undervoltage lockout hysteresis 250 mv v ovlo v in overvoltage lockout rising l 18 19 20 v v ovlo(hys) v in overvoltage lockout hysteresis 300 mv f osc oscillator frequency 2.25mhz parts 1mhz parts 2.25mhz parts 1mhz parts l l 2.05 0.92 1.8 0.82 2.25 1.00 2.45 1.08 2.6 1.16 mhz mhz mhz mhz v intvcc v intvcc ldo output voltage v in > 4v 3.3 3.6 3.9 v v pgood power good range 7.5 11 % r pgood power good resistance pgood r ds(on) at 500a 275 350 t pgood pgood delay pgood low to high pgood high to low 0 32 cycles cycles i pgood pgood leakage current 100 na ltc3621/ltc3621-2 3621f
4 for more information www.linear.com/ltc3621 typical p er f or m ance c harac t eris t ics burst mode operation pulse-skipping mode operation load step soft-start operation efficiency vs input voltage oscillator frequency vs temperature efficiency vs load current (burst mode operation) v in supply current vs input voltage efficiency vs load at dropout operation t j = 25c, unless otherwise noted. input voltage (v) 0 v in supply current (a) 3 4 5 16 3621 g02 2 1 0 2 4 6 8 10 12 14 18 20 sleep sd 3621 g04 sw 5v/div 4s/div v out ac-coupled 50mv/div i l 500ma/div v in = 12v v out = 3.3v burst mode operation i out = 50ma l = 2.2h 3621 g07 run 5v/div pgood 2v/div v out 1v/div i l 0.5a/div 400s/div 3621 g05 sw 5v/div v out ac-coupled 50mv/div i l 500ma/div v in = 12v v out = 3.3v pulse skip mode i out = 10ma l = 2.2h 4s/div 3621 g06 i load 500ma/div v out 100mv/div i l 500ma/div v in = 12v v out = 3.3v i load = 0.05a 40s/div load current (a) efficiency (%) 3621 g01 100 90 80 70 60 50 40 30 20 10 0 0.001 0.1 1 0.01 v in = 12v frequency = 2.25mhz v out = 2.5v v out = 3.3v v out = 5v load current (a) efficiency (%) 3621 g03 100 90 80 70 60 50 40 30 20 10 0 0.0001 0.001 0.1 1 0.01 v in = 5v frequency = 2.25mhz forced continuous mode burst mode operation temperature (c) ?50 oscillator frequency (mhz) 2.30 2.35 2.45 2.50 2.40 25 75 3621 g09 2.25 2.20 ?25 0 50 100 125 2.15 2.05 2.00 2.10 input voltage (v) 0 70 efficiency (%) 5 96 3621 g08 10 15 20 94 92 90 88 86 84 82 80 78 76 74 72 v out = 2.5v i load = 10ma i load = 1a ltc3621/ltc3621-2 3621f
5 for more information www.linear.com/ltc3621 typical p er f or m ance c harac t eris t ics r ds(on) vs temperature load regulation line regulation efficiency vs load at 1mhz v in supply current vs temperature switch leakage vs temperature oscillator frequency vs supply voltage reference voltage vs temperature r ds(on) vs input voltage t j = 25c, unless otherwise noted. supply voltage (v) 2 oscillator frequency (mhz) 3621 g10 7 12 17 2.30 2.35 2.45 2.50 2.40 2.25 2.20 2.15 2.05 2.00 2.10 input voltage (v) 100 r ds(on) (m) 300 500 700 200 400 600 4 8 12 16 3621 g12 20 20 6 10 14 18 top fet bottom fet temperature (c) ?50 100 r ds(on) (m) 150 250 300 350 600 450 0 50 75 100 3621 g13 200 500 550 400 ?25 25 125 top fet bottom fet load current (ma) 0 ?5 ?v out (%) 500 5 3621 g14 1000 1500 4 3 2 1 0 ?1 ?2 ?3 ?4 v in = 12v v out = 3.3v forced continuous mode input voltage (v) 0 ?0.5 ?v out error (%) 4321 0.5 3621 g15 8765 11109 12 17 16151413 0.3 0.1 ?0.1 ?0.3 temperature (c) ?50 v in supply current (a) 4 5 6 25 75 3521 g17 3 2 ?25 0 50 100 125 1 0 sleep shutdown temperature (c) ?100 ?50 reference voltage 599.5 600.0 600.5 3521 g11 599.0 598.5 0 50 100 150 598.0 597.5 temperature (c) ?50 0 sw leakage (a) 0.01 0.03 0.04 0.05 50 0.09 3621 g18 0.02 0 ?25 75 100 25 125 0.06 0.07 0.08 bottom fet top fet load current (a) efficiency (%) 3621 g16 100 90 80 70 60 50 40 30 20 10 0 0.0001 0.001 0.1 1 0.01 v in = 12v v out = 2.5v v out = 3.3v v out = 5v ltc3621/ltc3621-2 3621f
6 for more information www.linear.com/ltc3621 p in func t ions (dfn/msop) b lock diagra m sw (pin 1/pin 1): switch node connection to the inductor of the step-down regulator. v in (pin 2/pin 2): input voltage of the step-down regulator. run (pin 3/pin 3): logic controlled run input. do not leave this pin floating. logic high activates the step-down regulator. fb (pin 4/pin 5): feedback input to the error amplifier of the step-down regulator. connect a resistor divider tap to this pin. the output voltage can be adjusted from 0.6v to v in by: v out = 0.6v ? [1 + (r1/r2)] pgood (pin 4, msop package only): v out within regu- lation indicator. int v cc (pin 5/pin 6): low dropout regulator. bypass with at least 1f to ground. mode (pin 6/pin 7): burst mode select of the step-down regulator. tie mode to intv cc for burst mode operation with a 400ma peak current clamp, tie mode to gnd for pulse skipping operation, and tie mode to a voltage be - tween 1v and v intvcc C 1v for forced continuous mode. gnd (exposed pad pin 7/pin 9): ground backplane for power and signal ground. must be soldered to pcb ground. sgnd (pin 8, msop package only): signal ground. ? + ? + ? + + v error amplifier burst amplifier main i-comparator ? + ? + overcurrent comparator reverse comparator 0.6v fb mode run pgood intv cc clk v in ? 5v sw gnd 3621 bd v in intv cc oscillator ldo ms8e package only buck logic and gate drive slope compensation 0.8ms soft-start ltc3621/ltc3621-2 3621f
7 for more information www.linear.com/ltc3621 o pera t ion the ltc3621 uses a constant-frequency, peak current mode architecture. it operates through a wide v in range and regulates with ultralow quiescent current. the opera - tion frequency is set at either 2.25mhz or 1mhz. to suit a variety of applications, the selectable mode pin allows the user to trade off output ripple for efficiency . the output voltage is set by an external divider returned to the fb pin. an error amplifier compares the divided output voltage with a reference voltage of 0.6v and adjusts the peak inductor current accordingly . in the ms8e package, overvoltage and undervoltage comparators will pull the pgood output low if the output voltage is not within 7.5% of the programmed value. the pgood output will go high immediately after achieving regulation and will go low 32 clock cycles after falling out of regulation. main control loop during normal operation, the top power switch (p-channel mosfet) is turned on at the beginning of a clock cycle. the inductor current is allowed to ramp up to a peak level. once that level is reached, the top power switch is turned off and the bottom switch (n-channel mosfet) is turned on until the next clock cycle. the peak current level is con - trolled by the internally compensated ith voltage, which is the output of the error amplifier. this amplifier compares the fb voltage to the 0.6v internal reference. when the load current increases, the fb voltage decreases slightly below the reference, which causes the error amplifier to increase the ith voltage until the average inductor current matches the new load current. the main control loop is shut down by pulling the run pin to ground. low current operation two discontinuous-conduction modes (dcms) are available to control the operation of the ltc3621 at low currents. both modes, burst mode operation and pulse-skipping, automatically switch from continuous operation to the selected mode when the load current is low. to optimize efficiency, burst mode operation can be se - lected by tying the mode pin to intv cc . in burst mode operation, the peak inductor current is set to be at least 400ma, even if the output of the error amplifier demands less. thus, when the switcher is on at relatively light output loads, fb voltage will rise and cause the ith voltage to drop. once the ith voltage goes below 0.2v, the switcher goes into its sleep mode with both power switches off. the switcher remains in this sleep state until the external load pulls the output voltage below its regulation point. during sleep mode, the part draws an ultralow 3.5a of quiescent current from v in . to minimize v out ripple, pulse-skipping mode can be selected by grounding the mode pin. in the ltc3621, pulse-skipping mode is implemented similarly to burst mode operation with the peak inductor current set to be at about 66ma. this results in lower output voltage ripple than in burst mode operation with the trade-off being slightly lower efficiency. forced continuous mode operation aside from the two discontinuous-conduction modes, the ltc3621 also has the ability to operate in the forced continuous mode by setting the mode voltage between 1v and v intvcc C 1v. in forced continuous mode, the switcher will switch cycle by cycle regardless of what the output load current is. if forced continuous mode is selected, the minimum peak current is set to be C133ma in order to ensure that the part can operate continuously at zero output load. high duty cycle/dropout operation when the input supply voltage decreases towards the output voltage, the duty cycle increases and slope compensation is required to maintain the fixed switching frequency. the ltc3621 has internal circuitry to accurately maintain the peak current limit (i lim ) of 1.6a even at high duty cycles. as the duty cycle approaches 100%, the ltc3621 enters dropout operation. during dropout, if force continuous mode is selected, the top pmos switch is turned on continuously, and all active circuitry is kept alive. how - ever, if burst mode operation or pulse-skipping mode is selected, the part will transition in and out of sleep mode depending on the output load current. this significantly reduces the quiescent current, thus prolonging the use of the input supply . ltc3621/ltc3621-2 3621f
8 for more information www.linear.com/ltc3621 o pera t ion v in overvoltage protection in order to protect the internal power mosfet devices against transient voltage spikes, the ltc3621 constantly monitors the v in pin for an overvoltage condition. when v in rises above 19v, the regulator suspends operation by shutting off both power mosfets. once v in drops below 18.7v, the regulator immediately resumes normal opera - tion. the regulator executes its soft-start function when exiting an over voltage condition. low supply operation the l tc3621 incorporates an undervoltage lockout circuit which shuts down the part when the input voltage drops output voltage programming for non-fixed output voltage parts, the output voltage is set by external resistive divider according to the following equation: v out = 0.6v ? 1+ r2 r1 ? ? ? ? the resistive divider allows the fb pin to sense a fraction of the output voltage as shown in figure 1. i rms ? i out(max) v out v in v in v out C 1 this formula has a maximum at v in = 2v out , where: i rms ? i out 2 this simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. several capacitors may also be paralleled to meet size or height requirements in the design. for low input voltage applications, sufficient bulk input capacitance is needed to minimize transient effects during output load changes. output capacitor (c out ) selection the selection of c out is determined by the effective series resistance (esr) that is required to minimize voltage ripple and load step transients as well as the amount of bulk capacitance that is necessary to ensure that the control below 2.7v. as the input voltage rises slightly above the undervoltage threshold, the switcher will begin its basic operation. however, the r ds(on) of the top and bottom switch will be slightly higher than that specified in the electrical characteristics due to lack of gate drive. refer to graph of r ds(on) versus v in for more details. soft-start the ltc3621 has an internal 800s soft-start ramp. during start-up soft-start operation, the switcher will operate in pulse-skipping mode. a pplica t ions i n f or m a t ion v out r2 r1 3621 f01 c ff ltc3621 sgnd fb figure 1. setting the output voltage input capacitor (c in ) selection the input capacitance, c in , is needed to filter the square wave current at the drain of the top power mosfet. to prevent large voltage transients from occurring, a low esr input capacitor sized for the maximum rms current should be used. the maximum rms current is given by: ltc3621/ltc3621-2 3621f
9 for more information www.linear.com/ltc3621 a pplica t ions i n f or m a t ion loop is stable. loop stability can be checked by viewing the load transient response. the output ripple, ?v out , is determined by: v out < i l 1 8 ? f ? c out +esr ? ? ? ? ? ? the output ripple is highest at maximum input voltage since ?i l increases with input voltage. multiple capaci- tors placed in parallel may be needed to meet the esr and rms current handling requirements. dr y tantalum, special polymer , aluminum electrolytic, and ceramic capacitors are all available in surface mount packages. special polymer capacitors are very low esr but have lower capacitance density than other types. tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. aluminum electrolytic capacitors have significantly higher esr, but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long-term reliability. ceramic capacitors have excellent low esr characteristics and small footprints. using ceramic input and output capacitors higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. their high ripple current, high voltage rating and low esr make them ideal for switching regulator applications. however, care must be taken when these capacitors are used at the input and output. when a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the v in input. at best, this ringing can couple to the output and be mistaken as loop instability. at worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at v in large enough to damage the part. when choosing the input and output ceramic capacitors, choose the x5r and x7r dielectric formulations. these dielectrics have the best temperature and voltage char - acteristics of all the ceramics for a given value and size. since the esr of a ceramic capacitor is so low , the input and output capacitor must instead fulfill a charge storage requirement. during a load step, the output capacitor must instantaneously supply the current to support the load until the feedback loop raises the switch current enough to support the load. typically, five cycles are required to respond to a load step, but only in the first cycle does the output voltage drop linearly. the output droop, v droop , is usually about three times the linear drop of the first cycle. thus, a good place to start with the output capacitor value is approximately: c out = 3 ?i out f ? v droop more capacitance may be required depending on the duty cycle and load-step requirements. in most applications, the input capacitor is merely required to supply high frequency bypassing, since the impedance to the supply is very low. a 10f ceramic capacitor is usually enough for these conditions. place this input capacitor as close to the in pin as possible. output power good in the ms8e package, when the ltc3621s output voltage is within the 7.5% window of the regulation point, the output voltage is good and the pgood pin is pulled high with an external resistor. otherwise, an internal open-drain pull-down device (275) will pull the pgood pin low. to prevent unwanted pgood glitches during transients or dynamic v out changes, the ltc3621s pgood fall - ing edge includes a blanking delay of approximately 32 switching cycles. inductor selection given the desired input and output voltages, the inductor value and operating frequency determine the ripple current: i? l = v out f ? l 1? v out v in(max) ? ? ? ? ltc3621/ltc3621-2 3621f
10 for more information www.linear.com/ltc3621 a pplica t ions i n f or m a t ion lower ripple current reduces power losses in the inductor, esr losses in the output capacitors and output voltage ripple. highest efficiency operation is obtained at low frequency with small ripple current. however, achieving this requires a large inductor. there is a trade-off between component size, efficiency and operating frequency. a reasonable starting point is to choose a ripple current that is about 40% of i out(max) . to guarantee that ripple current does not exceed a specified maximum, the induc - tance should be chosen according to: l = v out f ? ?i l(max) 1? v out v in(max) ? ? ? ? once the value for l is known, the type of inductor must be selected. actual core loss is independent of core size for a fixed inductor value, but is very dependent on the inductance selected. as the inductance or frequency in - creases, core losses decrease. unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. copper losses also increase as frequency increases. ferrite designs have ver y low core losses and are pre - ferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. ferrite core material saturates hard, which means that in duct ance collapses abruptly when the peak design current is exceeded. this results in an abrupt increase in inductor ripple current and consequent output voltage ripple. do not allow the core to saturate! different core materials and shapes will change the size/ current and price/current relationship of an inductor. toroid or shielded pot cores in ferrite or permalloy materials are small and dont radiate much energy, but generally cost more than powdered iron core inductors with similar characteristics. the choice of which style inductor to use mainly depends on the price versus size requirements and any radiated field/emi requirements. new designs for surface mount inductors are available from toko, vishay, nec/tokin, cooper, tdk and wrth electronik. refer to table 1 for more details. checking transient response the regular loop response can be checked by looking at the load transient response. switching regulators take several cycles to respond to a step in load current. when a load step occurs, v out immediately shifts by an amount equal to the ?i load ? esr, where esr is the effective series resistance of c out . ?i load also begins to charge or discharge c out generating a feedback error signal used by the regulator to return v out to its steady-state value. during this recovery time, v out can be monitored for overshoot or ringing that would indicate a stability problem. the initial output voltage step may not be within the bandwidth of the feedback loop, so the standard second order overshoot/dc ratio cannot be used to determine phase margin. in addition, a feedforward capacitor can be added to improve the high frequency response, as shown in figure 1. capacitor c ff provides phase lead by creating a high frequency zero with r2, which improves the phase margin. the output voltage settling behavior is related to the stability of the closed-loop system and will demonstrate the actual overall supply performance. for a detailed explanation of optimizing the compensation components, including a review of control loop theory, refer to application note 76. in some applications, a more severe transient can be caused by switching in loads with large (>1f) input capacitors. the discharge input capacitors are effectively put in paral - lel with c out , causing a rapid drop in v out . no regulator can deliver enough current to prevent this problem if the switch connecting the load has low resistance and is driven quickly. the solution is to limit the turn-on speed of the load switch driver. a hot swap? controller is designed specifically for this purpose and usually incorporates current limiting, short-circuit protection and soft-starting. efficiency considerations the percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. it is often useful to analyze individual losses to determine what is limiting the efficiency and which change would ltc3621/ltc3621-2 3621f
11 for more information www.linear.com/ltc3621 a pplica t ions i n f or m a t ion produce the most improvement. percent efficiency can be expressed as: % efficiency = 100% C (l1 + l2 + l3 +) where l1, l2, etc. are the individual losses as a percent - age of input power . although all dissipative elements in the cir cuit produce losses, three main sour ces usually account for most of the losses in ltc3621 circuits: 1) i 2 r losses, 2) switching and biasing losses, 3) other losses. 1. i 2 r losses are calculated from the dc resistances of the internal switches, r sw , and external inductor, r l . in continuous mode, the average output current flows through inductor l but is chopped between the internal top and bottom power mosfets. thus, the series resistance looking into the sw pin is a function of both top and bottom mosfet r ds(on) and the duty cycle (dc) as follows: r sw = (r ds(on)top )(dc) + (r ds(on)bot )(1 C dc) the r ds(on) for both the top and bottom mosfets can be obtained from the typical performance characteristics curves. thus to obtain i 2 r losses: i 2 r losses = i out 2 (r sw + r l ) table 1. inductor selection table inductor inductance (h) dcr (m) max current (a) dimensions (mm) height (mm) manufacturer ihlp-1616bz-11 series 1.0 2.2 4.7 24 61 95 4.5 3.25 1.7 4.3 4.7 4.3 4.7 4.3 4.7 2 2 2 vishay www .vishay.com ihlp-2020bz-01 series 1 2.2 3.3 4.7 5.6 6.8 18.9 45.6 79.2 108 113 139 7 4.2 3.3 2.8 2.5 2.4 5.4 5.7 5.4 5.7 5.4 5.7 5.4 5.7 5.4 5.7 5.4 5.7 2 2 2 2 2 2 fdv0620 series 1 2.2 3.3 4.7 18 37 51 68 5.7 4 3.2 2.8 6.7 7.4 6.7 7.4 6.7 7.4 6.7 7.4 2 2 2 2 t oko www .toko.com mplc0525l series 1 1.5 2.2 16 24 40 6.4 5.2 4.1 6.2 5.4 6.2 5.4 6.2 5.4 2.5 2.5 2.5 nec/t okin www .nec-tokin.com hcp0703 series 1 1.5 2.2 3.3 4.7 6.8 8.2 9 14 18 28 37 54 64 11 9 8 6 5.5 4.5 4 7 7.3 7 7.3 7 7.3 7 7.3 7 7.3 7 7.3 7 7.3 3 3 3 3 3 3 3 cooper bussmann www.cooperbussmann.com rlf7030 series 1 1.5 2.2 3.3 4.7 6.8 8.8 9.6 12 20 31 45 6.4 6.1 5.4 4.1 3.4 2.8 6.9 7.3 6.9 7.3 6.9 7.3 6.9 7.3 6.9 7.3 6.9 7.3 3.2 3.2 3.2 3.2 3.2 3.2 tdk www.tdk.com we-tpc 4828 series 1.2 1.8 2.2 2.7 3.3 3.9 4.7 17 20 23 27 30 47 52 3.1 2.7 2.5 2.35 2.15 1.72 1.55 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 2.8 2.8 2.8 2.8 2.8 2.8 2.8 wrth elektronik www.we-online.com ltc3621/ltc3621-2 3621f
12 for more information www.linear.com/ltc3621 a pplica t ions i n f or m a t ion 2. the switching current is the sum of the mosfet driver and control currents. the power mosfet driver current results from switching the gate capacitance of the power mosfets. each time a power mosfet gate is switched from low to high to low again, a packet of charge dq moves from in to ground. the resulting dq/dt is a cur - rent out of in that is typically much larger than the dc control bias current. in continuous mode, i gatechg = f(q t + q b ), where q t and q b are the gate charges of the internal top and bottom power mosfets and f is the switching frequency. the power loss is thus: switching loss = i gatechg ? v in the gate charge loss is proportional to v in and f and thus their effects will be more pronounced at higher supply voltages and higher frequencies. 3. other hidden losses such as transition loss and cop - per trace and internal load resistances can account for additional efficiency degradations in the overall power system. it is very important to include these system level losses in the design of a system. transition loss arises from the brief amount of time the top power mosfet spends in the saturated region during switch node transitions. the ltc3621 internal power devices switch quickly enough that these losses are not sig - nificant compared to other sources. these losses plus other losses, including diode conduction losses during dead-time and inductor core losses, generally account for less than 2% total additional loss. thermal conditions in a majority of applications, the ltc3621 does not dis - sipate much heat due to its high efficiency and low thermal resistance of its exposed pad package. however , in ap - plications where the ltc3621 is running at high ambient temperature, high v in , high switching frequency, and maximum output current load, the heat dissipated may exceed the maximum junction temperature of the part. if the junction temperature reaches approximately 160c, both power switches will be turned off until the temperature drops about 15c cooler. to avoid the ltc3621 from exceeding the maximum junc - tion temperature, the user will need to do some thermal analysis. the goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. the temperature rise is given by: t rise = p d ? ja as an example, consider the case when the ltc3621 is used in applications where v in = 12v, i out = 1a, f = 2.25mhz, v out = 1.8v. the equivalent power mosfet resistance r sw is: r sw =r ds(on)top ? v out v in +r ds(on)bot ? 1? v out v in ? ? ? ? = 370m ? 1.8v 12v +150m ? 1? 1.8v 12v ? ? ? ? = 183m the v in current during 2.25mhz force continuous opera - tion with no load is about 5ma, which includes switching and internal biasing current loss, transition loss, inductor core loss and other losses in the application. therefore, the total power dissipated by the part is: p d = i out 2 ? r sw + v in ? i in(q) = 1a 2 ? 183m + 12v ? 5ma = 243mw the dfn 2mm 3mm package junction-to-ambient thermal resistance, ja , is around 64c/w. therefore, the junction temperature of the regulator operating in a 25c ambient temperature is approximately: t j = 0.243w ? 64c/w + 25c = 40.6c remembering that the above junction temperature is obtained from an r ds(on) at 25c, we might recalculate the junction temperature based on a higher r ds(on) since it increases with temperature. redoing the calculation assuming that r sw increased 5% at 40.6c yields a new ltc3621/ltc3621-2 3621f
13 for more information www.linear.com/ltc3621 junction temperature of 41.1c. if the application calls for a higher ambient temperature and/or higher switching frequency, care should be taken to reduce the temperature rise of the part by using a heat sink or forced air flow. board layout considerations when laying out the printed circuit board, the following checklist should be used to ensure proper operation of the ltc3621 (refer to figure 3). check the following in your layout: 1. do the capacitors c in connect to the v in and gnd as close as possible? these capacitors provide the ac current to the internal power mosfets and their drivers. 2. are c out and l closely connected? the (C) plate of c out returns current to gnd and the (C) plate of c in . 3. the resistive divider, r1 and r2, must be connected between the (+) plate of c out and a ground line ter - minated near gnd. the feedback signal v fb should be routed away from noisy components and traces, such as the sw line, and its trace should be minimized. keep r1 and r2 close to the ic. 4. solder the exposed pad (pin 7 for dfn, pin 9 for msop) on the bottom of the package to the gnd plane. connect this gnd plane to other layers with thermal vias to help dissipate heat from the ltc3621. 5. keep sensitive components away from the sw pin. the input capacitor, c in , feedback resistors, and intv cc bypass capacitors should be routed away from the sw trace and the inductor. 6. a ground plane is preferred. 7. flood all unused areas on all layers with copper, which reduces the temperature rise of power components. these copper areas should be connected to gnd. design example as a design example, consider using the l tc3621 in an application with the following specifications: v in = 10.8v to 13.2v v out = 3.3v i out(max) = 1a i out(min) = 0a f sw = 2.25mhz because efficiency and quiescent current is important at both 500ma and 0a current states, burst mode operation will be utilized. given the internal oscillator of 2.25mhz, we can calcu - late the inductor value for about 40% ripple current at maximum v in : l = 3.3v 2.25mhz ? 0.4a ? ? ? ? 1? 3.3v 13.2v ? ? ? ? = 2.75h given this, a 2.7h or 3.3h inductor would suffice. c out will be selected based on the esr that is required to satisfy the output voltage ripple requirement and the bulk capacitance needed for loop stability. for this design, a 22f ceramic capacitor will be used. c in should be sized for a maximum current rating of: i rms = 1a 3.3v 13.2v ? ? ? ? 13.2v 3.3v ? 1 ? ? ? ? 1/2 = 0.43a decoupling the v in pin with 10f ceramic capacitors is adequate for most applications. a pplica t ions i n f or m a t ion ltc3621/ltc3621-2 3621f
14 for more information www.linear.com/ltc3621 3.00 0.10 (2 sides) 2.00 0.10 (2 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (tbd) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.05 typ 1.35 0.10 (2 sides) 1 3 64 pin 1 bar top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dcb6) dfn 0405 0.25 0.05 0.50 bsc pin 1 notch r0.20 or 0.25 45 chamfer 0.25 0.05 1.35 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.15 0.05 0.70 0.05 3.55 0.05 package outline 0.50 bsc dcb package 6-lead plastic dfn (2mm 3mm) (reference ltc dwg # 05-08-1715 rev a) p ackage descrip t ion please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. ltc3621/ltc3621-2 3621f
15 for more information www.linear.com/ltc3621 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. p ackage descrip t ion please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. msop (ms8e) 0911 rev j 0.53 0.152 (.021 .006) seating plane note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 6. exposed pad dimension does include mold flash. mold flash on e-pad shall not exceed 0.254mm (.010") per side. 0.18 (.007) 0.254 (.010) 1.10 (.043) max 0.22 ? 0.38 (.009 ? .015) typ 0.86 (.034) ref 0.65 (.0256) bsc 0 ? 6 typ detail ?a? detail ?a? gauge plane 1 2 3 4 4.90 0.152 (.193 .006) 8 8 1 bottom view of exposed pad option 7 6 5 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) 0.52 (.0205) ref 1.68 (.066) 1.88 (.074) 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 1.68 0.102 (.066 .004) 1.88 0.102 (.074 .004) 0.889 0.127 (.035 .005) recommended solder pad layout 0.65 (.0256) bsc 0.42 0.038 (.0165 .0015) typ 0.1016 0.0508 (.004 .002) detail ?b? detail ?b? corner tail is part of the leadframe feature. for reference only no measurement purpose 0.05 ref 0.29 ref ms8e package 8-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1662 rev j) ltc3621/ltc3621-2 3621f
16 for more information www.linear.com/ltc3621 ? linear technology corporation 2013 lt 0313 ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/ltc3621 r ela t e d p ar t s typical a pplica t ion part number description comments ltc3646/ ltc3646-1 40v, 1a (i out ), 3mhz synchronous step-down dc/dc converter 95% efficiency , v in : 4v to 40v, v out(min) = 0.6v, i q = 140a, i sd < 8a, 3mm 4mm dfn-14, msop-16e packages l tc3600 1.5a, 15v , 4mhz synchronous rail-to-rail single resistor step-down regulator 95% efficiency, v in : 4v to 15v, v out(min) = 0v, i q = 700a, i sd < 1a, 3mm 3mm dfn-12, msop-12e packages l tc3601 15v , 1.5a (i out ) 4mhz synchronous step-down dc/dc converter 95% efficiency , v in : 4.5v to 15v, v out(min) = 0.6v, i q = 300a, i sd < 1a, 4mm 4mm qfn-20, msop-16e packages l tc3603 15v , 2.5a (i out ) 3mhz synchronous step-down dc/dc converter 95% efficiency , v in : 4.5v to 15v, v out(min) = 0.6v, i q = 75a, i sd < 1a, 4mm 4mm qfn-20, msop-16e packages l tc3633/ l tc3633a 15v, dual 3a (i out ) 4mhz synchronous step-down dc/dc converter 95% efficiency , v in : 3.6v to 15v, v out(min) = 0.6v, i q = 500a, i sd < 15a, 4mm 5mm qfn-28, tssop-28e packages. a version up to 20v in ltc3605/ ltc3605a 15v, 5a (i out ) 4mhz synchronous step-down dc/dc converter 95% efficiency , v in : 4v to 15v, v out(min) = 0.6v, i q = 2ma, i sd < 15a, 4mm 4mm qfn-24 package. a version up to 20v in ltc3604 15v, 2.5a (i out ) 4mhz synchronous step-down dc/dc converter 95% efficiency , v in : 3.6v to 15v, v out(min) = 0.6v, i q = 300a, i sd < 14a, 3mm 3mm qfn-16, msop-16e packages l tc1877 600ma (i out ) 550khz synchronous step-down dc/dc converter v in : 2.7v to 10v, v out(min) = 0.8v, i o = 10a, i sd < 1a, msop-8 package LT8610/lt8611 42v, 2.5a (i out ) synchronous step-down dc/dc converter 96% efficiency , v in : 3.4v to 42v, v out(min) = 0.97v, i q = 2.5a, i sd < 1a, msop-16e package r3 187k c fb 22pf c1 1f c out 22f 3621 ta02 l1 3.3h v out 5v r4 25.5k v in run sw v in 12v ltc3621-2 gnd fb mode intv cc c in 10f 5v out with 400ma burst mode operation, 2.25mhz 1.2v out , forced continuous mode, 1mhz c3 22pf c1 1f c2 22f 1.2v 2.7v to 17v 3621 ta03 l1 3.3h r5 604k 1v v in run sw ltc3621 gnd fb mode intv cc c3 10f r1 604k v v out v in ltc3621/ltc3621-2 3621f

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